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19-3349; Rev 2; 4/05
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
General Description
The MAX8594/MAX8594A complete power-management chips for low-cost personal digital assistants (PDAs) operates from a 1-cell lithium-ion (Li+) or 3-cell NiMH battery. They include all regulators, outputs, and voltage monitors necessary for small portable devices while requiring a bare minimum of external components. Featured are three linear regulators, a boost DCDC converter for LCD bias, an efficient 4MHz buck DC-DC converter for core power, a microprocessor (P) reset output, and low-battery shutdown in a 0.8mm high thin QFN package. The COR1 buck DC-DC converter supplies a pin-selectable output at 400mA. All linear regulators feature PMOS pass elements for efficient low-dropout operation. A MAIN LDO supplies 3.3V at 500mA. A securedigital (SD) card slot output supplies 3.3V at 500mA, and a COR2 LDO supplies 1.8V at 50mA. Each output has its own logic-controlled enable. For other output voltage combinations, contact Maxim. An LCD bias boost DC-DC converter features an onboard MOSFET and True ShutdownTM when off. This means that during shutdown, input power is disconnected from the inductor so the boost output falls to 0V rather than remaining one diode drop below the input voltage. A P reset output clears 20ms (typ) after the COR1 output achieves regulation to ensure an orderly start. In addition, the COR1 regulator is not started until the 3.3V main output is in regulation. Also included are a 1% accurate reference and low-battery monitor. Thermal shutdown protects the die from overheating. The MAX8594/MAX8594A operate from a 3.1V to a 5.5V supply voltage and consume 46A no-load supply current. They are packaged in a tiny, 4mm x 4mm, 24-pin thin QFN capable of dissipating 1.67W. The devices are specified for operation from -40C to +85C. Minimum External Components Efficient Step-Down DC-DC Powers CPU Core 1V/1.3V Selectable Core Voltage, 400mA (MAX8594) 1.3V/1.8V Selectable Core Voltage, 400mA (MAX8594A) Main LDO 3.3V, 500mA SD Card Output 3.3V, 500mA Second Core LDO 1.8V, 50mA High-Efficiency LCD Boost LCD 0V True Shutdown when Off 46A Quiescent Current
Features
MAX8594/MAX8594A
Typical Operating Circuit
MAX8594 MAX8594A
VIN IN LBI SDIG DBI MAIN COR2 ENM PV 1.8V, 50mA COR2
MAIN
3.3V, 500mA MAIN 3.3V, 500mA SD CARD SLOT
ON OFF ON OFF
SDIG
ENSD
TO IN
COR2 ON OFF COR1 ON OFF 1.8V/1.3V 1.3V/1V LCD ON OFF
ENC2
LXC PGND
1.3V OR 1.8V (MAX8594A) 1V OR 1.3V (MAX8594) 400mA COR1
ENC1
COR1
Applications
PDAs Organizers Cellular and Cordless Phones MP3 Players Handheld Devices
CV SW ENL LXL LCD 15V
TO MAIN
RS TO MAIN
LFB GND
Ordering Information
LBO
PART MAX8594ETG
TEMP RANGE PIN-PACKAGE -40C to +85C 24 Thin QFN-EP* 4mm x 4mm (T2444-4) 24 Thin QFN-EP* 4mm x 4mm (T2444-4)
TO MAIN
REF
DBO
MAX8594AETG -40C to +85C
Pin Configuration appears at end of the data sheet. True Shutdown is a trademark of Maxim Integrated Products, Inc. 1
*EP = Exposed pad.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
ABSOLUTE MAXIMUM RATINGS
IN, PV, ENSD, ENC1, ENC2, ENL, RS, SDIG, LBI, DBI to GND ...................................................-0.3V to +6V LXL to GND ............................................................-0.3V to +30V MAIN, COR1, COR2, REF, LFB, CV, ENM, LBO, DBO, LXC, SW to GND......................................-0.3V to (VIN + 0.3V) PV to IN..................................................................-0.3V to +0.3V PGND to GND .......................................................-0.3V to +0.3V Current into LXL..........................................................300mARMS Current out of SW .......................................................300mARMS Current into LXC .........................................................400mARMS Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70C) 24-Pin Thin QFN Package (derate 20.8mW/C above +70C) .................................1.67W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER GENERAL IN, PV Voltage Range VIN Complete Shutdown Threshold VDBI Complete Shutdown Threshold VLBI LBO Threshold VIN LBO Threshold VDBI = VIN, VIN falling VDBI = VIN, VIN rising VDBI falling VDBI rising VLBI rising VLBI falling VLBI = VIN, VIN falling VLBI = VIN, VIN rising Preset mode, VIN = 2.9V DBI Input Dual Mode Threshold ADJ mode, VIN = 2.9V Preset mode, VIN = 3.2V ADJ mode, VIN = 3.2V DBI Complete Shutdown Input Program Range DBI Input Bias Current LBI Input Bias Current VIN falling VDBI = 1.25V VLBI = 1.25V Shutdown (DBI remains on, REF off), VIN = VPV = VDBI = VLBI = 2.7V All off (REF on) All on; LXL, LXC not switching Main on, no load IN Operating Current Main on, no load, COR1 on, LXC not switching All on except LCD, VENL = 0V, LXL and LXC not switching 3.0 -50 -50 2 30 130 46 80 115 VIN 0.3 V VIN 1.2 5.5 +50 +50 10 55 180 75 110 160 A A V nA nA VIN 1.2 3.1 2.950 3.135 1.234 1.306 1.234 1.103 3.262 3.625 VIN 0.3 V 3.0 3.3 1.25 1.375 1.25 1.125 3.33 3.7 5.5 3.050 3.525 1.263 1.478 1.263 1.140 3.366 3.744 V V V V V CONDITIONS MIN TYP MAX UNITS
LBI Input Dual-Mode Threshold with Respect to IN
IN, PV Operating Current
Dual Mode is a trademark of Maxim Integrated Products, Inc. 2 _______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER LDOs MAIN, SDIG Soft-Start Time MAIN Output Voltage MAIN Current Limit ILOAD = 1mA MAIN Dropout Voltage SDIG Output Voltage SDIG Current Limit ILOAD = 1mA SDIG Dropout Voltage SDIG Reverse Leakage Current COR2 Output Voltage COR2 Current Limit COR1 PWM BUCK CV = high (MAX8594A) COR1 Output Voltage Accuracy CV = high (MAX8594) or CV = low (MAX8594A) CV = low (MAX8594) p-Channel On-Resistance n-Channel On-Resistance p-Channel Current-Limit Threshold n-Channel Current-Limit Threshold Minimum On- and Off-Times LXC Leakage Current REF AND RESET OUTPUT REF Voltage Accuracy REF Line Regulation REF Load Regulation RS Deassert Threshold for COR1 Rising (Note 1) IREF = 0.1A 3.1V < VIN < 5.5V, IREF = 0.1A 0.1A < IREF < 10A CV = low (MAX8594A), CV = low or CV = high (MAX8594) CV = high (MAX8594A) 88.00 67.0 1.236 1.25 0.1 1 90 69 1.264 3 3 93.25 72.7 V mV mV % tON(MIN) tOFF(MIN) VLXC = 0V, VENC1 = 0V -10 ILXC = -180mA ILXC = -180mA, VPV = 3.1V ILXC = 180mA ILXC = 180mA, VPV = 3.1V -0.500 -0.50 1.743 1.259 0.972 1.8 1.3 1 0.70 0.8 0.25 0.30 -0.75 -0.72 0.1 0.1 +0.1 +10 1.855 1.340 1.023 1.34 1.58 0.46 0.53 -0.925 -0.92 A A s A V ILOAD = 200mA ILOAD = 500mA VSDIG = 5.5V, VENSD = VIN = 0V ILOAD = 100A to 50mA, VIN = 3.6V to 5.5V 1.755 65 ILOAD = 300mA ILOAD = 500mA ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V 3.218 525 ILOAD = 100A to 300mA, VIN = 3.6V to 5.5V 300 3.218 550 600 3.3 800 1 210 350 3.3 718 0.75 170 525 7 1.8 98 300 1010 15 1.845 150 A V mA mV 330 595 3.383 900 V mA mV 1200 3.383 1200 s V mA CONDITIONS MIN TYP MAX UNITS
MAX8594/MAX8594A
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER RS Assert Threshold RS Deassert Delay RS Assert Delay LCD LXL Voltage Range LXL Current Limit LXL On-Resistance LXL Leakage Current Maximum LXL On-Time Minimum LXL Off-Time LFB Feedback Threshold LFB Input Bias Current SW Off-Leakage Current SW PMOS On-Resistance SW PMOS Peak Current Limit SW PMOS Average Current Limit Soft-Start Time LOGIC EN_, CV Input Low Level EN_, CV Input High Level EN_, CV Input Leakage Current RS, LBO, DBO Output Low Level DBO Output Low Level RS, LBO, DBO Output High Leakage THERMAL PROTECTION Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis Rising temperature +160 15 C C Sinking 1mA, VIN = 2.5V Sinking 100A, VIN = 1.0V VOUT = 5.5V, VIN = 5.5V VIN = 3.1V to 5.5V VIN = 3.1V to 5.5V 1.4 0.01 0.02 0.02 1 0.1 0.1 1 0.35 V V A V V A CSW = 1F VLFB = 1.3V VSW = 0V, VPV = 5.5V, VENL = 0V VLFB > 1.1V VLFB < 0.8V (soft-start) VLXL = 28V 2 0.8 3.9 1.229 L1 = 10H 195 235 1.7 0.2 3 1 5 1.25 5 0.01 1 700 300 0.13 2 4 1.2 6.0 1.270 50 1 1.5 28 275 V mA A s s V nA A mA mA ms 50mV overdrive CONDITIONS CV = low or CV = high (MAX8594), CV = low (MAX8594A) CV = high (MAX8594A) 10 MIN TYP 80 62.5 20 5 30 ms s MAX UNITS %
4
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
ELECTRICAL CHARACTERISTICS
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER GENERAL IN, PV Voltage Range VIN Complete Shutdown Threshold VDBI Complete Shutdown Threshold VLBI LBO Threshold VIN LBO Threshold VDBI = VIN, VIN falling VDBI = VIN, VIN rising VDBI falling VDBI rising VLBI rising VLBI falling VLBI = VIN, VIN falling VLBI = VIN, VIN rising Preset mode, VIN = 2.9V DBI Input Dual-Mode Threshold ADJ mode, VIN = 2.9V Preset mode, VIN = 3.2V ADJ mode, VIN = 3.2V DBI Complete Shutdown Input Program Range DBI Input Bias Current LBI Input Bias Current VIN falling VDBI = 1.25V VLBI = 1.25V Shutdown (DBI remains on, REF off), VIN = VPV = VDBI = VLBI = 2.7V All off (REF on) All on, LXL, LXC not switching Main on, no load IN Operating Current Main on, no load, COR1 on, LXC not switching All on except LCD, VENL = 0V, LXL and LXC not switching LDOs MAIN, SDIG Soft-Start Time MAIN Output Voltage MAIN Current Limit MAIN Dropout Voltage ILOAD = 300mA ILOAD = 500mA Ramp ILIM from 0% to 100% ILOAD = 100A to 300mA, VIN = 3.6V to 5.5V 300 3.209 550 1200 3.383 1230 330 595 s V mA mV 3.0 -50 -50 VIN 0.3 V VIN 1.25 5.5 +50 +50 10 55 180 75 110 160 A A V nA nA VIN 1.25 3.1 2.93 3.135 1.228 1.306 1.228 1.103 3.248 3.609 VIN 0.3 V 5.5 3.06 3.525 1.264 1.478 1.264 1.140 3.366 3.744 V V V V V CONDITIONS MIN TYP MAX UNITS
MAX8594/MAX8594A
LBI Input Dual-Mode Threshold with Respect to IN
IN, PV Operating Current
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5
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER SDIG Output Voltage SDIG Current Limit SDIG Dropout Voltage SDIG Reverse Leakage Current COR2 Output Voltage COR2 Current Limit COR1 PWM BUCK CV = high (MAX8594A) COR1 Output Voltage Accuracy CV = high (MAX8594) or CV = low (MAX8594A) CV = low (MAX8594) p-Channel On-Resistance n-Channel On-Resistance p-Channel Current-Limit Threshold n-Channel Current-Limit Threshold LXC Leakage Current REF AND RESET OUTPUT REF Voltage Accuracy REF Line Regulation REF Load Regulation RS Deassert Threshold for COR1 Rising (Note 1) RS Deassert Delay LCD LXL Voltage Range LXL Current Limit LXL Leakage Current Maximum LXL On-Time Minimum LXL Off-Time LFB Feedback Threshold LFB Input Bias Current SW Off-Leakage Current SW PMOS On-Resistance VLFB = 1.3V VSW = 0V, VPV = 5.5V, VENL = 0V L1 = 10H VLXL = 28V VLFB > 1.1V VLFB < 0.8V (soft-start) 180 2 0.8 3.9 1.223 28 280 2 4 1.2 6.0 1.270 50 1 1.5 V mA A s s V nA A IREF = 0.1A 3.1V < V < 5.5V, IREF = 0.1A 0.1A < IREF < 10A CV = low or CV = high (MAX8594), CV = low (MAX8594A) CV = high (MAX8594A) 88.00 67.0 10 1.229 1.264 3 3 93.25 72.7 30 ms V mV mV % VPV = 5.5V, VLXC = 0V or VPV, VENC1 = 0V ILXC = -180mA ILXC = -180mA, VPV = 3.1V ILXC = 180mA ILXC = 180mA, VPV = 3.1V -0.460 -0.46 -10 1.743 1.255 0.969 1.855 1.340 1.023 1.34 1.58 0.46 0.53 -0.925 -0.92 +10 A A A V ILOAD = 200mA ILOAD = 500mA VSDIG = 5.5V, VENSD = VIN = 0V ILOAD = 100A to 50mA, VIN = 3.6V to 5.5V 1.750 60 CONDITIONS ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V MIN 3.218 485 TYP MAX 3.383 900 300 1250 15 1.845 150 UNITS V mA mV A V mA
6
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER LOGIC EN_, CV Input Low Level EN_, CV Input High Level EN_, CV Input Leakage Current RS, LBO, DBO Output Low Level DBO Output Low Level RS, LBO, DBO Output High Leakage Sinking 1mA, VIN = 2.5V Sinking 100A, VIN = 1.0V VOUT = 5.5V, VIN = 5.5V VIN = 3.1V to 5.5V VIN = 3.1V to 5.5V 1.4 1 0.1 0.1 1 0.35 V V A V V A CONDITIONS MIN TYP MAX UNITS
MAX8594/MAX8594A
Note 1: The reset trip point tracks the COR1 voltage. For example, a minimum reset spec does not occur with a maximum COR1 spec, and a minimum COR1 spec does not occur with a maximum reset spec. Note 2: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, VIN = 4V, TA = +25C, unless otherwise noted.)
MAIN DROPOUT VOLTAGE vs. LOAD CURRENT
MAX8594/MAX8594A toc01
SDIG DROPOUT VOLTAGE vs. LOAD CURRENT
MAX8594/MAX8594A toc02
MAIN OUTPUT VOLTAGE vs. LOAD CURRENT
3.25 OUTPUT VOLTAGE (V) 3.00 2.75 2.50 2.25 2.00 1.75 1.50
MAX8594/MAX8594A toc03
500 450 DROPOUT VOLTAGE (mV) 400 350 300 250 200 150 100 50 0 0 100 200 300 400 500
800 700 DROPOUT VOLTAGE (mV) 600 500 400 300 200 100 0
3.50
600
0
100
200
300
400
500
600
0
100 200 300 400 500 600 700 800 900 LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25C, unless otherwise noted.)
SDIG OUTPUT VOLTAGE vs. LOAD CURRENT
MAX8594/MAX8594A toc04
COR1 OUTPUT VOLTAGE vs. LOAD CURRENT
1.8 1.7 OUTPUT VOLTAGE (V) 1.6 1.5 1.4 1.3 1.2 1.1
MAX8594/MAX8594A toc05
3.50 3.25 OUTPUT VOTLAGE (V) 3.00 2.75 2.50 2.25 2.00 1.75 1.50 0 100 200 300 400 500 600
1.9
1.0 0.9 700 0 100 200 300 400 LOAD CURRENT (mA) LOAD CURRENT (mA)
COR2 OUTPUT VOLTAGE vs. LOAD CURRENT
1.80 1.78 OUTPUT VOLTAGE (V) 1.76 1.74 1.72 1.70 1.68 1.66 1.64 1.62 1.60 0 20 40 60 80 100 IOUT
MAX8594/MAX8594A toc06
LOAD-TRANSIENT MAIN
MAX8594/MAX8594A toc07
1.82
VMAIN
50mV/div AC-COUPLED
100mA/div 0
100s/div
LOAD CURRENT (mA)
LOAD-TRANSIENT COR1
MAX8594/MAX8594A toc08
INPUT CURRENT vs. INPUT VOLTAGE
MAX8594/MAX8594A toc09
60 50
VCOR1
INPUT CURRENT (A)
20mV/div AC-COUPLED
40 30
VIN FALLING
VIN RISING 20 10 0
IOUT
100mA/div 0
40s/div
0
1
2
3
4
5
6
INPUT VOLTAGE (V)
8
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25C, unless otherwise noted.)
RS AND OUTPUT TIMING
MAX8594/MAX8594A toc10
LCD EFFICIENCY vs. LOAD CURRENT
85
MAX8594/MAX8594A toc11
90 5V/div 0 2V/div 0 5V/div 0 1V/div 0 EFFICIENCY (%)
VIN
80 75 70 65 60 55 VLCD = 18V VLCD = 15V
VMAIN VRS
VCOR1
50 45 40 0 1 2 3 4 5
20ms/div
LOAD CURRENT (mA)
LCD OUTPUT VOLTAGE vs. LOAD CURRENT
MAX8594/MAX8594A toc12
LCD OUTPUT VOLTAGE vs. INPUT VOLTAGE
18.03 OUTPUT VOLTAGE (V) 18.02 18.01 18.00 17.99 17.98 17.97 17.96
MAX8594/MAX8594A toc13
18.2 18.0 OUTPUT VOLTAGE (V) 17.8 17.6 17.4 17.2 17.0 16.8 0 2 4 6 8 10
18.04
12
3.5
4.0
4.5 INPUT VOLTAGE (V)
5.0
5.5
LOAD CURRENT (mA)
LCD SWITCHING WAVEFORMS
MAX8594/MAX8594A toc14
SDIG RESPONSE TO ENSD
MAX8594/MAX8594A toc15
VIN
20mV/div AC-COUPLED 50mV/div AC-COUPLED VENSD
2V/div
VLCD
VLX
20V/div 1V/div
ILX
200mA/div
VSDIG ILOAD = 100mA
4s/div
200s/div
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9
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25C, unless otherwise noted.)
LCD RESPONSE TO ENL
MAX8594/MAX8594A toc16
MAIN RESPONSE TO ENM
MAX8594/MAX8594A toc17
VENL
2V/div VENM
2V/div
LCD BOOST SOFT-START SW TURN-ON VLCD 5V/div VMAIN ILOAD = 100mA 400s/div 200s/div
1V/div
COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc18
RS AND COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc19
RLOAD = 10 VENC1 2V/div VENC1
RLOAD = 10 2V/div
VCOR1 500mV/div VCOR1 0 VRS
1V/div 5V/div
200mA/div ILXC ILXC 200mA/div
40s/div FOR RS RESPONSE, SEE RS AND COR1 RESPONSE TO ENC1
10ms/div
COR2 RESPONSE TO ENC2
MAX8594/MAX8594A toc20
COR1 EFFICIENCY vs. LOAD CURRENT WITH 1V OUTPUT
85
MAX8594/MAX8594A toc21
90 2V/div EFFICIENCY (%)
VENC2
80 75 70 65 60 55 VIN = 3.6V VIN = 4V VIN = 5V
VCOR2
1V/div
50 45 40 MAX8594 0.1 1 10 100 1000
200s/div
LOAD CURRENT (mA)
10
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25C, unless otherwise noted.)
COR1 EFFICIENCY vs. LOAD CURRENT WITH 1.3V OUTPUT
85 80 EFFICIENCY (%) 75 70 65 60 55 50 45 40 0.1 1 10 100 1000 LOAD CURRENT (mA) VIN = 4V VIN = 3.6V VIN = 5V
MAX8594/MAX8594A toc22
COR1 EFFICIENCY vs. LOAD CURRENT WITH 1.8V OUTPUT
95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.1 1 10 100 1000 LOAD CURRENT (mA) VIN = 5V VIN = 4V VIN = 3.6V
MAX8594/MAX8594A toc22a
90
100
LIGHT-LOAD SWITCHING COR1
MAX8594/MAX8594A toc23
HEAVY-LOAD SWITCHING COR1
MAX8594/MAX8594A toc24
ILOAD = 20mA VLXC 5V/div 0 50mV/div AC-COUPLED VLXC
ILOAD = 200mA 5V/div 0 50mV/div AC-COUPLED
VCOR1
VCOR1
ILXC
ILXC 200mA/div
200mA/div
1s/div
200ns/div
COR1 RESPONSE TO CV
MAX8594/MAX8594A toc25
1.3V/1.8V VCOR1 1V/1.3V
500mV/div
0
VCV
2V/div
40s/div
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11
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Pin Description
PIN NAME FUNCTION 3.3V, 500mA LDO Output for Secure-Digital Card Slot. SDIG has reverse current protection so SDIG can be biased when no power is present at IN. SDIG output turns off when VIN is below the DBI threshold, ENSD goes low, or MAIN is out of regulation. When SDIG turns off, the output is discharged at a rate depending on the load and the internal feedback resistors (typically 1.3M). Input Voltage to the MAX8594/MAX8594A. Bypass IN to GND with a 1F ceramic capacitor. Reset Output. RS is an active-low, open-drain output that goes high impedance 20ms (typ) after COR1 is in regulation. COR1 does not turn on until MAIN is in regulation. If MAIN falls out of regulation, COR1 turns off and RS goes low. If MAIN is still in regulation, then RS goes low when VIN is below the DBI threshold. RS goes low when ENC1 is low. Low-Battery Detector Open-Drain Output. LBO is an active-low, open-drain output that goes high impedance when VIN is greater than both the DBI and LBI thresholds. LBO goes low when VIN falls below the LBI threshold. Dead-Battery Detector Open-Drain Output. When VIN is below the DBI threshold, both DBO and LBO go low, all outputs shut down, and the MAX8594/MAX8594A enter the lowest possible quiescentcurrent state. Once this occurs, MAIN does not turn back on until both VIN exceeds the DBI threshold and ENM = high. DBO is an active-low, open-drain output that goes high impedance when VIN exceeds the DBI threshold. Dead-Battery Detector. DBI remains active at all times. If DBI = IN, the DBI threshold is 3.0V when IN is falling and 3.3V when rising. The DBI threshold can also be adjusted to other values by connecting DBI to a resistor voltage-divider. Also see the DBO description. Low-Battery Detector. If LBI = IN, the LBI threshold is 3.33V when IN is falling and 3.7V when rising. The LBI threshold can also be adjusted to other values by connecting LBI to a resistor voltagedivider. Also see the LBO description. Selects 1V or 1.3V COR1 Output Voltage for MAX8594, and 1.3V or 1.8V COR1 for MAX8594A. Drive CV high or connect to IN for a 1.3V COR1 output (1.8V COR1 for MAX8594A). Drive CV low or connect to GND for a 1V COR1 output (1.3V COR1 for MAX8594A). Enable Input for MAIN. No other outputs turn on until MAIN is in regulation. If MAIN is pulled out of regulation, all other outputs turn off and RS goes low. MAIN cannot be activated when VIN is below the DBI threshold. Ground 1.25V 1% Reference. Bypass REF with a 0.1F capacitor to GND. REF is enabled when VIN is greater than the DBI threshold. REF is off when VIN is below the DBI threshold. LCD Feedback Input. Connect LFB to a resistor-divider network between the LCD output and GND. The feedback threshold is 1.25V. LCD turns off when VIN is below the DBI threshold, when ENL goes low, or when MAIN is out of regulation. When off, the LCD output is discharged at a rate depending on the load and the external feedback resistors (typically 2.4M). Enable Input for LCD (Boost Regulator). Drive ENL high to activate the LCD boost. Drive ENL low to shut down the LCD output. The LCD converter cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation. LCD Boost Switch. Connect LXL to a boost inductor and Schottky diode. See Figure 1.
1
SDIG
2
IN
3
RS
4
LBO
5
DBO
6
DBI
7
LBI
8
CV
9 10 11
ENM GND REF
12
LFB
13 14
ENL LXL
12
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
Pin Description (continued)
PIN 15 16 17 18 19 20 NAME SW PV PGND LXC ENC1 ENSD FUNCTION LCD True-Shutdown Switch Output. SW is the power source for the LCD boost inductor. SW turns on when ENL is high. For best efficiency, bypass SW with a 4.7F capacitor to GND. SW is disconnected from PV when LCD is shut down. Power Input for COR1 Buck Converter and LCD True-Shutdown Switch. Connect IN to PV. Power Ground COR1 Switching Node. Connect LXC to the COR1 inductor. See Figure 1. Enable Input for Primary Core Buck Converter (COR1). Drive ENC1 high to turn on COR1 and low to turn off. COR1 cannot be activated if VIN is below the DBI threshold or before MAIN is in regulation. Enable Input for Secure Digital Card (SDIG). Drive ENSD low to turn off SDIG and high to turn on. SDIG cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation. Feedback Sense Input for COR1 Output. COR1 turns off when VIN is below the DBI threshold, when ENC1 goes low, or when MAIN is out of regulation. When off, the output is discharged by LXC through an internal 1M (typ) resistor. Enable Input for Secondary Core LDO (COR2). Drive ENC2 high to turn on COR2 and low to turn off. COR2 cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation. COR2 can be activated when VIN is greater than the DBI threshold and MAIN is in regulation. 1.8V, 50mA LDO Output for Secondary Core. COR2 turns off when VIN is below the DBI threshold, when ENC2 goes low, or when MAIN is out of regulation. The COR2 output is discharged at a rate depending on the load and the internal feedback resistors (typically 700k). 3.3V, 500mA LDO Output for Main Supply. MAIN output turns off when VIN is below the DBI threshold or when ENM goes low. When off, the output is discharged at a rate depending on the load and the internal feedback resistors (1.3M typ). Exposed Pad. Connect to ground for enhanced power dissipation.
MAX8594/MAX8594A
21
COR1
22
ENC2
23
COR2
24 --
MAIN EP
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13
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
AC ADAPTER INPUT 4.15V TO 7V 1F USB INPUT 4.15V TO 6V 1F EN 500mA 100mA USEL
DC
MAX8601
BATT 1F Li-ION BATTERY
POWER INPUT C1 1F
MAX8594 MAX8594A
MAIN IN LBI SDIG DBI C2 4.7F
3.3V, 500mA MAIN 3.3V, 500mA SD CARD SLOT
USB MAIN CHARGE CONTROL DIE THERMAL CONTROL POK LOGIC GND FLT COR2 ON OFF COR1 ON OFF 1.8V/1.3V 1.3V/1V LCD ON OFF
C3 4.7F COR2 C4 2.2F PV C5 0F LXC PGND L2 2.2H
ON OFF ON OFF
ENM
1.8V, 50mA COR2
SDIG
ENSD
TO IN 1.3V OR 1.8V C6 (MAX8594A) 2.2F 1V OR 1.3V (MAX8594) 400mA COR1
ENC2
CHG
ISEL
ENC1
COR1
CV SW ENL LXL R1 2.2M RS LFB GND LBO R2 200k C9 47pF L1 10H MURATA LQH32C C7 4.7F LCD C8 15V 1F
TO MAIN R8 1M TO MAIN R7 1M
TO MAIN R6 1M DBO
REF C10 0.1F
Figure 1. Typical Application Circuit with Charger
14
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
MAX8594 MAX8594A
POWER INPUT C1 1F ON OFF ON OFF ON OFF ON OFF 1.8V/1.3V 1.3V/1V ENM LDO CONTROL ENSD COR2 ENC2 LDO CONTROL ENC1 PV C5 0F PWM BUCK LXC L2 2.2H PGND FB MAINOK LCD ON OFF ENL LXL LCD BOOST RS 20ms AFTER COR1 OK LFB GND R2 200k R1 2.2M C9 47pF COR1 TO PV SW LCD OFF SWITCH L1 10H MURATA LQH32C C7 4.7F LCD C8 15V 1F C4 2.2F 1.8V, 50mA COR2 IN LDO CONTROL
MAIN C2 4.7F
3.3V, 500mA MAIN
SDIG C3 4.7F
3.3V, 500mA SD CARD SLOT
TO IN C6 2.2F 1.3V OR 1.8V (MAX8594A) 1V OR 1.3V (MAX8594) 400mA COR1
CV
TO MAIN R8 1M
TO MAIN R7 1M LBO
REF REF IN C10 0.1F
TO MAIN R6 1M DBO LBI DBI TO IN TO IN
Figure 2. Block Diagram ______________________________________________________________________________________ 15
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Detailed Description
COR1 Step-Down DC-DC Converter
The COR1 regulator is a proprietary hysteretic PWM control step-down converter that supplies up to 400mA. The output voltage is set to either 1V or 1.3V by CV for the MAX8594 and 1.3V or 1.8V for the MAX8594A. Under moderate to heavy loading, COR1 operates in a low-noise PWM mode with constant frequency and modulated pulse width. Switching harmonics generated by fixed-frequency operation are consistent and easily filtered. With light loads (<30mA), COR1 operates in an efficiency-enhanced Idle ModeTM during which the converter switches only as needed to service the load. function is ideal for applications that require the output voltage to fall to 0V in shutdown (True Shutdown). If True Shutdown is not required, the SW switch can be bypassed by connecting the boost inductor directly to PV and removing the bypass cap on SW (C7 in Figure 1).
System Sleep
All regulated outputs turn off when VDBI < 1.25V (or VIN = 3.0V if DBI = IN, Figure 1). The MAX8594/MAX8594A resume normal operation when VDBI >1.375V (or VIN = 3.3V if DBI = IN, Figure 1).
Reset Output (RS)
Reset RS asserts when COR1 falls 20% below its set level (38% for 1.8V setting in the MAX8594A). RS is an open-drain, active-low output. Connect a pullup resistor from RS to the logic supply of the gate receiving the reset signal. RS deasserts a minimum of 10ms after the COR1 output is in regulation. Upon application of valid input power, the MAIN output activates first (if ENM = high) followed by other outputs (if EN_ = high). Power and output sequencing are shown in Figure 3.
Linear Regulators
Power for main logic, a SD card slot, and CODEC are provided by three LDOs: * MAIN--Provides 3.3V at a guaranteed 500mA with a typical current limit of 800mA. * SDIG--Provides 3.3V at a guaranteed 500mA for SD cards with a typical current limit of 718mA. * COR2--Provides 1.8V at a guaranteed 50mA for a CODEC core with a typical current limit of 98mA. Note that it may not be possible to draw the full rated current of MAIN and SDIG at all operating input voltages due to the dropout limitations of those regulators. The typical dropout resistance of the MAIN regulator is 0.7 (350mV drop at 500mA), and the typical dropout resistance of the SDIG regulator is 0.85 (525mV drop at 500mA). All voltage outputs have separate enable inputs (ENM, ENL, ENSD, ENC1, and ENC2); however, no other output turns on until MAIN is in regulation. MAIN cannot be activated until VIN exceeds the DBI threshold. When SDIG is turned off, reverse current is blocked so the SDIG output can be biased with an external source when no power is present at IN. Leakage current is typically 3A with 3.3V at SDIG.
VIN
VIN = 3.7V VIN = 3.3V
VIN = 3.33V VIN = 3.0V
3.3V MAIN COR1 COR1 AT 90% RS
MAIN AT 90% MAIN AT 86%
20ms RS DEASSERT DELAY
LBO DBO
LCD DC-DC Boost
The MAX8594/MAX8594A include a low-current, highvoltage boost DC-DC converter for LCD bias. This circuit can output up to 28V and is adjustable with either an analog or PWM control signal using external components. SW provides an input-power disconnect for the LCD when ENL is low (off). The input-power disconnect
Figure 3. Power Sequence for Rising and Falling Input Voltage. Note that VIN thresholds are for LBI and DBI connected to VIN. Other thresholds can be set with resistors.
Idle Mode is a trademark of Maxim Integrated Products, Inc. 16 ______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
Power Sequencing
As VIN increases from 0V, sequencing is as follows: 1) The DBI comparator is always on. DBO, LBO, and RS are pulled low at approximately VIN = 0.7V. MAIN, SDIG, COR1, COR2, and LCD are off. 2) When VIN rises above the DBI threshold (3.3V if DBI = IN), DBO goes high impedance immediately and the part turns on. The MAIN LDO turns on if ENM = HIGH. When the MAIN output reaches 90% of its nominal voltage, or 2.97V, all other regulators turn on if they are enabled. RS goes high impedance 20ms after COR1 reaches 90% of its nominal voltage (69% when 1.8V setting in the MAX8594A is used). The COR1 output capacitor C6 (Figure 1) is required to keep the output voltage ripple small; 2.2F is recommended for most applications. Due to the pulsating nature of input current in a buck converter, a low-ESR input capacitor is required for input voltage filtering and to minimize interference with other circuits. The impedance of the input capacitor, C5 (Figure 1), should be kept very low at the switching frequency. A minimum value of 4.7F is recommended at PV for most applications. The input capacitor can be increased to further improve input filtering.
MAX8594/MAX8594A
3)
4)
LDO Output Capacitors (MAIN, SDIG, COR2)
Capacitors are required at each LDO output of the MAX8594/MAX8594A for stable operation over the full load and temperature range. See Figure 1 for recommended capacitor values for each output. To reduce noise and improve load-transient response, larger output capacitors up to 10F can be used. Surface-mount ceramic capacitors have very low ESR and are commonly available in values up to 10F. X7R and X5R dielectrics are recommended. Note that some ceramic dielectrics, such as Z5U and Y5V, exhibit large capacitance and ESR variation with temperature and require larger than the recommended values to maintain stability overtemperature.
When VIN rises above the LBI threshold (3.7V if LBI = IN), LBO goes high impedance. As IN decreases, sequencing is as follows: 1) 2) When VIN falls to the LBO threshold (3.33V if LBI = IN), LBO is pulled to GND. If VIN falls to the DBI threshold (3.0V if LBI = IN) before the MAIN output falls to 2.838V, DBO and RS go low, all regulators turn off, and the part is shut down. If the MAIN output falls below 86% of its nominal voltage (2.838V) before IN reaches the DBI threshold (3.0V if DBI = IN), RS is pulled to GND and all other outputs turn off, but MAIN remains on (in dropout) and DBO remains high until IN falls to the DBI threshold.
5)
3)
Setting LBI and DBI
The DBI and LBI inputs monitor input voltage (usually a battery) and trigger the DBO and LBO outputs. With LBI and DBI connected to IN, the LBI and DBI thresholds are internally set. For a rising input voltage, DBO goes high when VIN exceeds 3.3V and LBO goes high when VIN exceeds 3.7V. For a falling input voltage, LBO goes low when VIN falls below 3.3V and DBO goes low when V IN falls below 3.0V (see also the Electrical Characteristics table and Figure 3). Alternatively, the LBI and DBI thresholds can be set with external resistors as shown in Figures 4 and 5.
Applications Information
COR1 Buck Output
COR1 Inductor A 2.2H inductor with a saturation current of at least 500mA is recommended. For lower load currents, the inductor current rating may be reduced. For maximum efficiency, the inductor's DC resistance should be as low as possible. Note that core materials differ among manufacturers and inductor types, resulting in variations in efficiency. COR1 Capacitors Ceramic input and output capacitors are recommended. For best stability over a wide temperature range, use capacitors with an X5R or X7R dielectric due to their low ESR and low temperature coefficient.
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17
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
IN R3 DBI (1.25V FALLING, 1.375V RISING) LBI (1.125V FALLING, 1.25V RISING) DBI (1.25V FALLING, 1.375V RISING) LBI (1.125V FALLING, 1.25V RISING) IN R6 R8
R4
R7
R5
R9
MAX8594 MAX8594A Figure 4. Setting the DBI and LBI Threshold with Three External Resistors
MAX8594 MAX8594A Figure 5. Setting the DBI and LBI Thresholds with Four Resistors
In Figure 4, one three-resistor-divider can set both DBI and LBI according to the following equations (shown for setting falling thresholds). Choose the lower resistor of the divider chain (R5 in Figure 4) to be between 100k and 250k. The equations for the two upper resistordividers as a function of each (falling) threshold are: V 1.25 R 3 = R5 x LBFALL x 1 - 1.125 VDBFALL
Alternately, LBI and DBI can be set with separate resistor-dividers. The resistor calculation is simpler and the two settings do not interact, but one more resistor is needed and battery drain is slightly higher due to the extra resistor load. Choose the lower resistor of each divider chain (R7 and R9 in Figure 5) to be between 100k and 250k. The equations for upper resistordividers as a function of each (falling) threshold are: V R6 = R7 x DBFALL - 1 1.25
R4 = R5 x
1.25 x VLBFALL -1 1.125 x VDBFALL
where VDBFALL and VLBFALL are the desired falling thresholds to trigger the DBO and LBO outputs, respectively. Once those thresholds are selected, the rising DBI and LBI thresholds are: VDBRISE = 1.375 x R 3 + R4 + R5 R4 + R5
V R8 = R9 x LBFALL - 1 1.125 where VDBFALL and VLBFALL are the desired falling thresholds to trigger the DBO and LBO outputs, respectively. Once those thresholds are selected, the rising DBI and LBI thresholds are: VDBRISE = 1.375 x R6 + R7 R7
VLBRISE = 1.25 x
R 3 + R4 + R5 R5 VLBRISE = 1.25 x
R8 + R9 R9
Note that the low-battery threshold should not be set below the dead-battery threshold because both DBO
18 ______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
VIN
MAX5365
SIMPLIFIED DC-DC CONVERTER AVDD VDOUT DAC ID R2 I2 VREF 1.25V CONTROL RD R1 I1 ERROR AMP VOUT
MAX8594 MAX8594A
Figure 6. Adjusting the Output Voltage with a DAC
and LBO are automatically driven low and the part is shut down when the DBI threshold is crossed (going low).
capacitor is sufficient for most applications; however, the optimum value is affected by PC board layout. Setting LCD Voltage Adjust the output voltage by connecting a voltagedivider from the LCD output to LFB (see Figure 1). Select R2 between 10k and 200k. Calculate R1 with the following equation: V R1 = R2 x OUT - 1 VLFB where VLFB = 1.25V and VOUT can range from VIN to 28V. The input bias current of LFB is typically only 5nA, allowing large-value resistors to be used. For less than 1% error, the current through R2 should be greater than 100 times the feedback input bias current (ILFB).
LCD Boost Output
LCD Inductor The LCD boost is designed to operate with a wide range of inductor values (4.7H to 150H). Smaller inductance values typically offer smaller size for a given series resistance or saturation current. Smaller values cause LX to switch more frequently for a given load and can reduce efficiency at low load currents. Larger values reduce switching losses due to less frequent switching for a given load, but higher DC resistance can reduce efficiency. Note that for inductors larger than 43H, the peak inductor current does not reach 250mA before the LXL maximum on-time (3s) expires. This reduces output current but may be beneficial for light-load efficiency. A 10H inductor provides a good balance and works well for most applications. The inductor's saturation current rating should be greater than the peak switching current (250mA). LCD Diode Schottky diodes rated at 250mA or more, such as the MBR0530 or Nihon EP05Q03L, are recommended. The diode reverse-breakdown voltage rating must be greater than the LCD output voltage. LCD Capacitors For most applications, use a ceramic 1F output capacitor. This typically provides a peak-to-peak output ripple of 30mV. In addition, bypass IN with 1F and SW with 4.7F ceramic capacitors. An LCD feed-forward capacitor, connected from the output to LFB, improves stability over a wide range of battery voltages. A 47pF
LCD Adjustment
The LCD boost output can be digitally adjusted by either a DAC or PWM signal. DAC Adjustment Adding a DAC and a resistor, RD, to the divider circuit (Figure 6) provides DAC adjustment of VOUT. Ensure that VOUT(MAX) does not exceed the LCD panel rating. The output voltage (VOUT) as a function of the DAC voltage (VDOUT) is calculated using the following formula:
R1 (1.25 - VDOUT ) xR1 VOUT = 1.25 x 1 + + RD R2
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19
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Using PWM Signals Many Ps have the ability to create PWM outputs. These are digital outputs, based on either 16-bit or 8-bit counters, with a programmable duty cycle. In many applications, they are suitable for adjusting the output of the MAX8594/MAX8594A as seen in Figure 7. The circuit consists of the PWM source, capacitor C11, and resistors RD and RW. To analyze the transfer function of the PWM circuit, it is easiest to first simplify it to its Thevenin equivalent. The Thevenin voltage is calculated using the following formula: VTHEV = (D x VOH ) + (1 - D) x VOL where D is the duty cycle of the PWM signal, VOH is the PWM output high level (often 3.3V), and V OL is the PWM output low level (usually 0V). For CMOS logic, this equation simplifies to: VTHEV = D x VDD where VDD is the logic-high output voltage of the PWM output. The Thevenin impedance is the sum of resistors RW and RD: RTHEV = RD + RW The output voltage (VOUT) as a function of the PWM average voltage (VTHEV) is: R1 (1.25 - VTHEV ) xR1 VOUT = 1.25 x 1 + + R THEV R2 When using the PWM adjustment method, RD isolates the capacitor from the feedback loop of the MAX8594/MAX8594A. The cutoff frequency of the lowpass filter is defined as: fC = 1 2 x xR THEV xC11
SW C7 4.7F
LXL R1 2.2M LFB C9 47pF
LCD C8 15V 1F
R2 200k
CONNECTION FOR PWM-CONTROLLED LCD BIAS RW
RD
C11
Figure 7. PWM-Controlled LCD Bias
PC Board Layout and Grounding
Careful PC board layout is important for minimizing ground bounce and noise. Keep the MAX8594/ MAX8594A's ground pin and the ground leads of the input and output capacitors less than 0.2in (5mm) apart. In addition, keep all connections to LFB, COR1, LXC, and LXL as short as possible. In particular, external feedback resistors should be as close to LFB as possible. To minimize output voltage ripple and to maximize output power and efficiency, use a ground plane and solder PGND and exposed pad directly to the ground plane. Refer to the MAX8594 evaluation kit for a layout example.
The cutoff frequency should be at least two decades below the PWM frequency to minimize the induced AC ripple at the output. An important consideration is the turn-on transient created by the initial charge on filter capacitor C11. This capacitor forms a time constant with RTHEV, causing the output to initialize at a higher than intended voltage. This overshoot is minimized by scaling RD as high as possible compared to R1 and R2. Alternatively, the P can briefly keep the LCD disabled until the PWM voltage has had time to stabilize.
Thermal Considerations
In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed backside pad of the thin QFN package to a large ground plane, preferably on a surface of the board that receives good airflow. Typical applications use multiple ground planes to minimize thermal resistance. Avoid large AC currents through the ground plane.
20
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5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs
Chip Information
PGND LXC
Pin Configuration
TOP VIEW
18
ENC1
MAX8594/MAX8594A
17
16
15
14
13 12 11 10
LFB
19 20 21 22 23 24 1 SDIG 2 IN 3 RS 4 LBO 5 DBO 6 DBI
ENL
LXL
SW
TRANSISTOR COUNT: 3436 PROCESS: BiCMOS
PV
ENSD COR1
ENC2
REF GND
ENM
MAX8594 MAX8594A
9 8 7
COR2 MAIN
CV LBI
THIN QFN
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21
5-Output PMICs with DC-DC Core Supply for Low-Cost PDAs MAX8594/MAX8594A
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
1
2
PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
24L QFN THIN.EPS

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